This invention relates to a semiconductor memory device and, in particular, to selection of a memory cell and a bus precharge method in a semiconductor memory device using flat memory cells.
FIG. 1 is a circuit diagram of a memory cell array and a peripheral circuit thereof in a semiconductor memory device using flat memory cells. As shown in the figure, the illustrated circuit comprises a memory cell array 108, a sense amplifier 111 (the block will later be illustrated), a Y selector circuit 110, a GND selector circuit 107, precharge circuits 105 and 112 (the blocks will later be illustrated), and precharge selector circuits 106 and 109.
Next, a traditional operation upon selection of a memory cell will briefly be described. At first, a word line and a bank select line are selected. The Y selector circuit 110 selects a digit line DG0 while the GND selector circuit 107 selects a GND line VG0. An electric current from the sense amplifier 111 to the GND line GND in the above-mentioned state is represented by a current path IL1. At this time instant, a selected memory cell C0 is determined. If the selected memory cell C0 is an OFF bit (memory cell through which no electric current flows), an electric current does not flow from the sense amplifier 111 towards the GND line GND. However, if memory cells C1, C2, C3, . . . , Cn successively adjacent to the memory cell C0 are ON bits (memory cells through which an electric current flows), the electric current flows towards a current path IL2 as illustrated in the figure to inhibit the operation of the sense amplifier 111.
In order to suppress the above-mentioned phenomenon, the precharge circuit 105 is used. The precharge selector circuit 106 precharges a GND line VG1 adjacent to a selected data bus line to a level equal to that of the selected digit line DG0. Thus, a current flow towards the current path IL2 is interrupted. In order to detect a small current by the sense amplifier 111, it is necessary to minimize the amount of the electric current flowing through the current path IL2 illustrated in FIG. 1. For this purpose, a digit line DG1 may be precharged by the precharge circuit 112 and the precharge selector circuit 109, in addition to the GND line VG1.